MoSys Advantages

Enabling a new generation of denser, lower-power, better-performing, more cost-effective SoCs.

MoSys embedded memory IP transforms the performance/features/cost equation for systems on chips (SoCs), enabling applications that would be impossible or impractical using conventional technology. The benefits of MoSys IP include better die utilization (more functionality in a smaller die area), lower overall system costs (through increased integration), higher performance, lower power, higher reliability and greater manufacturability. Embedded memory is becoming increasingly critical to higher SoC integration, and MoSys IP confers decisive advantages in markets such as home entertainment and graphics and mobile consumer devices.
MoSys 1T-SRAM^® memory uses one transistor per bit cell, providing three or more times the density of conventional six-transistor SRAM (6T-SRAM). By replacing conventional SRAM with an equivalent amount of 1T-SRAM, SoC designers can cut die size considerably. Smaller die size translates into significant cost reductions and also results in a higher yield of good dies, for additional savings versus other memory technologies. MoSys embedded memory can save millions of dollars over the life of a high-volume SoC.

MoSys 1T-FLASH™ likewise cuts costs by providing high-density embedded non-volative memory in a baseline CMOS logic process. Other high-density embedded flash alternatives use more costly non-baseline processes.

Instead of packing the same amount of memory and logic into a smaller die—with the attendant cost savings—MoSys customers can pack more memory and/or logic into the original die area, thus adding value and increasing the average selling price (ASP) of the SoC.




MoSys's patented MULTIBANK^® architecture enables 1T-SRAM to achieve speeds twice those of embedded DRAM (eDRAM), and equivalent to 6T-SRAM but at much higher densities. High-frequency operation coupled with the wide bus widths made possible by the MULTIBANK architecture allows 1T-SRAM to meet the requirements of today's high-bandwidth applications. 1T-FLASH is likewise the best-performing memory in its class, and the first at 100Mhz.


The best of both worlds: MoSys 1T-SRAM combines the density of embedded DRAM with the performance and low power of conventional 6T-SRAM.

Through the use of patented circuit and architectural techniques, MoSys 1T-SRAM cuts standby power by as much as 4X compared to equivalent 6T-SRAM embedded memory. Power consumption is also far lower than eDRAM. Ultra-low standby power, coupled with already low active operating power, makes 1T-SRAM the ideal candidate for wireless and low power mobile applications. MoSys 1T-FLASH and analog/mixed-signal IP also support low-power implementations, superior to competing technologies.

All 1T-SRAM CLASSIC Macros include MoSys patented TEC^® error correction circuitry as part of their design. This highly integrated error correction circuitry (ECC) allows MoSys memory macros to automatically correct hard and soft errors during the life cycle of the device, from manufacturing through field use. Since TEC operates continuously over all conditions, the reliability of CLASSIC Macros is ensured during all phases of operation. Because repair is automatically handled by TEC, testing becomes a simple go/no-go test using standard test patterns, greatly simplifying this phase of manufacturing.

MoSys products are available to designers as custom, compiled or pre-configured IP. Standard views, models and databases allow MoSys IP to be easily integrated into the customer's standard design flow.

MoSys IP is production-proven and supported by the world's leading ASIC foundries. 1T-SRAM and 1T-FLASH are manufactured in standard logic processes used by SoCs, making them much easier to integrate than memory technologies (such as eDRAM) requiring special processes.

MoSys technology is highly portable from process node to process node and from one manufacturing process to another. MoSys offers customization services and broad-based technology licenses to fine-tune its technology to specific processes used by integrated device manufacturers (IDMs).

The benefits of MoSys IP will only increase as embedded memory circuitry becomes more critical to SoC success. Memory is consuming an ever-growing share of SoC real estate, due to the increasing complexity of applications, requiring more data and program code, and to system price/size constraints, dictating that more such information be stored locally on chip.